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| ASM3106C/4106C DATA SHEET ASM3106C/4106C ASM3106C/4106C - VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR 1.0 General Description The ASM3106C/4106C is very low cost voice synthesizer with 4-bit microprocessor. It has various features including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog timer(WDT), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS technology and halt function can minimize power dissipation. Its architecture is similar to RISC, with two stages of instruction pipeline. It allows all instructions to be executed in a single cycle, except for program branches and data table read instructions (which need two instruction cycles). 1.1 Feature Single power supply can operate from 2.4V through 5V Internal Program ROM: 4K x 10-bit 1 sets of 17-bit DPR can access up to 128K x 10 bits data memory space Data Registers: * 64 x 4-bit data RAM (00-1Fh plus 40h-5Fh) * Unbanked special function registers (SFR) range: 20h-3Fh I/O Ports: * PRA: 4-bit I/O Port A (2Bh) * PRB: 2-bit Output Port B (2Dh) On-chip clock generator: Resistive Clock Drive(RM) Timer: 1 * Timer0: a 9-bit auto-reload timer/counter Stack: 2-level subroutine nesting HALT and Release from HALT function to reduce power consumption Watch Dog Timer (WDT) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles Number of instruction: 22 The Voice function can be implemented by microprocessor instruction 1 Rev 1.0 ASM3106C/4106C FIGURE 1.1 : Block Diagram of ASM3106C/4106C Data Bus[3:0] ROM Latch PCL(4) PC[11:0] (ADDR[16:12]) =00000b ADDR[16:0] Stack(12) (2-Level) 0 ROM_ADDR[16:0] 1 DPR3,2,1 DPR[16:0] Program (Data) ROM Instruction Latch Instruction Bus [9:0] Instruction Decoder PCLATCH(8) PCH(8) DLATCH(10) ROM_Data[9:0] Data Bus[3:0] Accumlator(4) Instruction Bus [9:0] SRAM ALU(4) Register(4) Immediate(4) (64 x 4) 00h-1Fh 40h-5Fh Timer0(9) PRA(4) PRB(2) P1,P2,P3,P4 enter test mode ( Voice synthesizer ) Clock Generator Test select Power on Reset RESET pin PRA0 weak or strong pull-low for PRA, PRB, PRC OSC VDD/GND PRASL(4) One-Channel Reset Chip Reset Chip COUT COUT 2 Rev 1.0 Instruction Bus [9:0] Control Signal ASM3106C/4106C FIGURE 1.2 : External ROM Map of ASM3106C/4106C PC[11:0] 12bit x 2 STACK 17-bit Data Pointer Reset Vector 00000h 00080h Reserved for Testing Program and data ROM 00080h-003FFh 00400h 00000h-00FFFh 00000h-1FFFFh 00FFFh(4K) Data ROM 1FFFFh(128Kx10-bits) 3 Rev 1.0 ASM3106C/4106C 1.2 Pin-Out ASM3106C/4106C Pin-Out VDD PRA3-1 PRA0/RESET I I/O I/O Power supply during operation STI I/O port with programmable strong pull-low or weak pull-low or fix-inputStd./O.D. floating capability Output type with standard or Open-Drain output STI I/O port with programmable strong pull-low or weak pull-low or fix-inputStd./O.D. floating capability Output type with standard or Open-Drain output Mask option selected as an external RESET pin with weak pull-low capability RM mode Oscillator input Current Output of Audio Circuit Ground Potential Enter Test Mode. ( TEST = High ) Std./O.D. Output type with standard or Open-Drain output OSC COUT GND TEST PRB0-1 I O I O O 1.3 Application circuit 4 Rev 1.0 ASM3106C/4106C 1.4 Bonding Diagram 128K x 10 bit ROM ASM3106C/4106C 1 11 10 9 CHIP SIZE: X= 1550+100(um) , Y= 2170+100(um) 2 3 4 5 6 7 8 ASM3106C/4106C Pad Location PAD # 1 2 3 4 5 6 PAD Name RA_PAD[3] RA_PAD[2] RA_PAD[1] RA_PAD[0] AOSC GND X -664.92 -664.92 -662.64 -468.24 -281.04 -111.72 Y -675.72 -803.84 -1000.4 -1000.4 -1000.4 -1000.4 Chip Size: X=1550+100 (um), Y=2170+100 (um) PAD # PAD Name X Y 7 TEST_PAD 105.44 -1000.4 8 ACOUT 303.96 -1000.4 9 VDD 683.04 -1000.4 10 RB_PAD[0] 664.92 -799.4 11 RB_PAD[1] 664.92 -681 5 Rev 1.0 ASM3106C/4106C 1.5 DC Characteristics for ASM3106C/4106C SYMBOL VDD Isb Iop PARAMETER OPERATING VOLTAGE SUPPLY CURREN T STANDBY OPERATING VDD MIN. TYP. MAX. UNIT 2.4 3 5 3 5 3 5 5 3 5 3 5 -10 -20 3 5 1 1 2 7 3 9 -5.2 -3 -8 7 20 10 20 V uA mA CONDITION depending on Freq. 4MHz, RM in HALT Mode 4MHz, RM IO Floating 4MHz, RM in HALT Mode (IO Ports with weak pull-high pull-low) 4MHz, RM (IO ports) Fosc(3v)Fosc(2.4v) Fosc (3v) VDD=3V, Rosc=980k, 4MHz Iih INPUT CURRENT /Internal pull low OUTPUT HIGH CURRENT OUTPUT LOW CURRENT FREQUENCY STABILITY Fosc VARIATION uA Ioh Iol dF/F dF/F mA % % FIGURE 1.3 : Frequency Range for Rosc in RM mode Resistor(k ohm) 3v Freq.(MHz) 1200 3.1 1000 3.87 R osc & F req. 820 4.53 470 7.44 8 Freq. MHz 6 4 2 0 0 200 400 7.44 4.53 3.87 3.1 600 800 1000 1200 1400 R osc k ohm 6 Rev 1.0 |
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